About me

I am a third-year Ph.D. student affiliated with the research group led by Prof. Peipei Zhou at the Brown University.

My academic pursuits revolve around Heterogeneous Architecture, Software and Hardware Co-design, and Programming Abstraction for Applications.

What i'm doing

  • design icon

    Hardware Accelerator

    This involves the simultaneous development of both hardware and software components of a system. It emphasizes the integration and optimization of hardware and software to achieve better overall system performance, efficiency, and functionality.

  • Web development icon

    HLS Programming

    High-level synthesis (HLS) is a design process in digital electronics that allows the transformation of a high-level description of a digital system into a register transfer level (RTL) implementation.

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    Applications

    So far, I have been working on several interesting applications including Large Integer Multiplication, Rivest-Shamir-Adleman, Mandelbort Set, and Homomorphic Encryption.

Resume

Education

  1. Brown University

    2024 — now

    Ph.D. student in Electronic and Computer Engineering

    Advisor: Prof. Peipei Zhou


  2. University of Pittsburgh

    2022 — 2024

    Ph.D. student in Electronic and Computer Engineering

    Advisor: Prof. Peipei Zhou

  3. Huazhong University of Science and Technology

    2019 — 2022

    Master of Engineering in Electronic Packaging

  4. Huazhong University of Science and Technology

    2015 — 2019

    Bachelor of Engineering in Electronic Packaging

Publication

  1. Zhuoping Yang, Jinming Zhuang, Jiaqi Yin, Cunxi Yu, Alex K. Jones, Peipei Zhou.    AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP.    Proceedings of the 42nd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2023, October 29, 2023 - November 2, 2022, San Francisco, CA, USA. Full Paper Accepted (acceptance ratio is 21 percent).

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  2. Jinming Zhuang, Zhuoping Yang, Peipei Zhou.    High Performance, Low Power Matrix Multiply Design on ACAP: from Architecture, Design Challenges and DSE Perspectives.    Proceedings of the 60th ACM/IEEE Design Automation Conference, San Francisco, California, USA, (DAC'23), July 9-13, 2023, San Francisco, CA, USA.

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  3. Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex K. Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou.    CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture.    Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA'23), February 12-14, 2023, Monterey, CA, USA.

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